Ferroelectric field-effect transistors has been considered to be an ideal technology for nonvolatile memory because of its random access, high speed, low power, high density and simplicity. In addition, the read operation is non-destructive. The device can be considered as a ferroelectric layer inserted in a field-effect transistor between a gate contact and an insulator layer above a channel between a source region and a drain region
When the ferroelectric field-effect transistor (i.e., FeFET) is biased, the existence of a channel current from the source region to the drain region depends on the polarization of the ferroelectric layer. The write operation simply applies voltage on the gate relative to the source region and drain region. When the write voltage exceeds the coercive field of the ferroelectric layer, the polarization will change, writing data to the FeFET.
Although FeFET memory has been researched for a number of year, FeFET memory is not yet commercially available. One problem with FeFET memory is poor data retention, which is understood to be a result of the depolarization field and current leakage, which compensates the ferroelectric polarization. In practice, FeFET memory has not been able to achieve memory retention for more than a couple of days, which is a far cry from the ten year retention standard of many nonvolatile memory devices.